RM0367 Rev 7 447/1043
RM0367 AES hardware accelerator (AES)
466
9. Repeat steps 6,7,8 to process all the blocks encrypted with the same key.
Figure 96. ECB/CBC decryption (Mode 3)
Suspend/resume operations in ECB/CBC modes
To suspend the processing of a message, proceed as follows:
1. If DMA is used, stop the AES DMA transfers to the IN FIFO by clearing the DMAINEN
bit of the AES_CR register.
2. If DMA is not used, read four times the AES_DOUTR register to save the last
processed block. If DMA is used, wait until the CCF flag is set in the AES_SR register
then stop the DMA transfers from the OUT FIFO by clearing the DMAOUTEN bit of the
AES_CR register.
3. If DMA is not used, poll the CCF flag of the AES_SR register until it becomes 1
(computation completed).
4. Clear the CCF flag by setting the CCFC bit of the AES_CR register.
5. Save initialization vector registers (only required in CBC mode as AES_IVRx registers
are altered during the data processing).
6. Disable the AES peripheral by clearing the bit EN of the AES_CR register.
7. Save the current AES configuration in the memory (except AES initialization vector
values).
8. If DMA is used, save the DMA controller status (pointers for IN and OUT data transfers,
number of remaining bytes, and so on).
Note: In point 7, the derived key information stored in AES_KEYRx registers can optionally be
saved in memory if the interrupted process is a decryption. Otherwise those registers do not
need to be saved as the original key value is known by the application
MS18938V3
WR
CT3
WR
CT2
WR
CT1
WR
CT0
Wait until flag CCF = 1
RD
PT3
RD
PT2
RD
PT1
RD
PT0
Input phase
4 write operations into
AES_DINR[31:0]
Computation phase
Output phase
4 read operations from
AES_DOUTR[31:0]
PT = plaintext = 4 words (PT3, … , PT0)
CT = ciphertext = 4 words (CT3, … , CT0)
MSB LSB MSB LSB