09/03
3-22
DC 3535/2240/1632, WC M24
IQ21
Initial issue
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IQ21 Developer Bias RAP
Procedure
WARNING
HIGH VOLTAGE!
Exercise caution when performing the voltage checks in this procedure.
Enter dC140 [09-026]. Check the voltage at P/J580 for the affected color(s). There should be
approximately 370 VAC and -540 VDC (+/- 10%) present. The voltages are within range.
YN
There is +24 VDC from P/J501 pin 13 to P/J501 pin 10 on the DEV/BTR2/DTS HVPS.
YN
There is +24 VDC from P/J553 pin 2 to P/J553 pin 4 on the I/F PWB
YN
Go the +24 VDC Wirenets to troubleshoot this problem.
Go to Flag 2. Check for an open circuit
Check that the HVPS Control PWB is seated correctly. If the problem continues, replace
the DEV/BTR2/DTS HVPS (PL 9.1).
Go to Flag 1. Check for an open circuit or a short circuit to ground. Check P/J580 and the HV
terminals on the Developer Housing(s). for damage or loose connections. If the checks are
good, return the RAP from which you came.
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