Reset and clock control (RCC) RM0367
176/1043 RM0367 Rev 7
–LSI clock
– APB clock (PCLK)
• The RTC/LCD clock which is derived from the following clock sources:
– LSE clock,
– LSI clock,
– 4 MHz HSE_RTC (HSE divided by a programmable prescaler).
• IWDG clock which is always the LSI clock.
The system clock (SYSCLK) frequency must be higher or equal to the RTC/LCD clock
frequency.
The RCC feeds the Cortex
®
System Timer (SysTick) external clock with the AHB clock
(HCLK) divided by 8. The SysTick can work either with this clock or with the Cortex
®
clock
(HCLK), configurable in the SysTick Control and Status Register.
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