ST STM32L0x3

RM0367 Rev 7 211/1043
RM0367 Reset and clock control (RCC)
225
Bit 4 TIM6EN: Timer 6 clock enable bit
Set and cleared by software.
0: Timer 6 clock disabled
1: Timer 6 clock enabled
Bits 3:2 Reserved, must be kept at reset value.
Bit 1 TIM3EN: Timer3 clock enable bit
Set and cleared by software.
0: Timer3 clock disabled
1: Timer3 clock enabled
Bit 0 TIM2EN: Timer2 clock enable bit
Set and cleared by software.
0: Timer2 clock disabled
1: Timer2 clock enabled