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Universal synchronous/asynchronous receiver transmitter (USART/UART) RM0367

822/1043 RM0367 Rev 7

29.8.8 USART interrupt and status register (USART_ISR)

Address offset: 0x1C

Reset value: 0x0200 00C0

Bits 31:5 Reserved, must be kept at reset value.

Bit 4 TXFRQ: Transmit data flush request

Writing 1 to this bit sets the TXE flag.

This allows to discard the transmit data. This bit must be used only in Smartcard mode,

when data has not been sent due to errors (NACK) and the FE flag is active in the

USART_ISR register.

If the USART does not support Smartcard mode, this bit is reserved and must be kept at

reset value. Please refer to Section 29.4: USART implementation on page 766.

Bit 3 RXFRQ: Receive data flush request

Writing 1 to this bit clears the RXNE flag.

This allows to discard the received data without reading it, and avoid an overrun condition.

Bit 2 MMRQ: Mute mode request

Writing 1 to this bit puts the USART in mute mode and sets the RWU flag.

Bit 1 SBKRQ: Send break request

Writing 1 to this bit sets the SBKF flag and request to send a BREAK on the line, as soon as

the transmit machine is available.

Note: In the case the application needs to send the break character following all previously

inserted data, including the ones not yet transmitted, the software should wait for the

TXE flag assertion before setting the SBKRQ bit.

Bit 0 ABRRQ: Auto baud rate request

Writing 1 to this bit resets the ABRF and ABRE flags in the USART_ISR and request an

automatic baud rate measurement on the next received data frame.

Note: If the USART does not support the auto baud rate feature, this bit is reserved and must

be kept at reset value. Please refer to Section 29.4: USART implementation on

page 766.

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Res. Res. Res. Res. Res. Res. Res. Res. Res. REACK TEACK WUF RWU SBKF CMF BUSY

rrrrrrr

1514131211109876543210

ABRF ABRE Res. EOBF RTOF CTS CTSIF LBDF TXE TC RXNE IDLE ORE NF FE PE

rr rrrrrrrrrrrrr

Bits 31:25 Reserved, must be kept at reset value.

Bits 24:23 Reserved, must be kept at reset value.

ST STM32L0x3 User Manual

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