RM0367 Rev 7 873/1043
RM0367 Serial peripheral interface/ inter-IC sound (SPI/I2S)
922
31 Serial peripheral interface/ inter-IC sound (SPI/I2S)
31.1 Introduction
The SPI/I²S interface can be used to communicate with external devices using the SPI
protocol or the I
2
S audio protocol. SPI or I
2
S mode is selectable by software. SPI mode is
selected by default after a device reset.
The serial peripheral interface (SPI) protocol supports half-duplex, full-duplex and simplex
synchronous, serial communication with external devices. The interface can be configured
as master and in this case it provides the communication clock (SCK) to the external slave
device. The interface is also capable of operating in multimaster configuration.
The Inter-IC sound (I
2
S) protocol is also a synchronous serial communication interface. It
can operate in slave or master mode with half-duplex communication. Full duplex
operations are possible by combining two I2S blocks.
It can address four different audio standards including the Philips I
2
S standard, the MSB-
and LSB-justified standards and the PCM standard.
31.1.1 SPI main features
• Master or slave operation
• Full-duplex synchronous transfers on three lines
• Half-duplex synchronous transfer on two lines (with bidirectional data line)
• Simplex synchronous transfers on two lines (with unidirectional data line)
• 8-bit to 16-bit transfer frame format selection
• Multimaster mode capability
• 8 master mode baud rate prescalers up to f
PCLK
/2.
• Slave mode frequency up to f
PCLK
/2.
• NSS management by hardware or software for both master and slave: dynamic change
of master/slave operations
• Programmable clock polarity and phase
• Programmable data order with MSB-first or LSB-first shifting
• Dedicated transmission and reception flags with interrupt capability
• SPI bus busy status flag
• SPI Motorola support
• Hardware CRC feature for reliable communication:
– CRC value can be transmitted as last byte in Tx mode
– Automatic CRC error checking for last received byte
• Master mode fault, overrun flags with interrupt capability
• CRC Error flag
• 1-byte/word transmission and reception buffer with DMA capability: Tx and Rx requests