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ST STM32L0x3 - Page 1020

ST STM32L0x3
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Code examples RM0367
1020/1043 RM0367 Rev 7
A.19.4 SPI master configuration with DMA code example
/* (1) Master selection, BR: Fpclk/256
CPOL and CPHA at zero (rising first edge) */
/* (2) TX and RX with DMA, slave select output enabled, RXNE IT, 8-bit Rx
fifo */
/* (3) Enable SPI1 */
SPI1->CR1 = SPI_CR1_MSTR | SPI_CR1_BR; /* (1) */
SPI1->CR2 = SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN | SPI_CR2_SSOE;; /* (2) */
SPI1->CR1 |= SPI_CR1_SPE; /* (3) */
A.19.5 SPI slave configuration with DMA code example
/* nSS hard, slave, CPOL and CPHA at zero (rising first edge) */
/* (1) TX and RX with DMA, RXNE IT, 8-bit Rx fifo */
/* (2) Enable SPI2 */
SPI2->CR2 = SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN; /* (1) */
SPI2->CR1 |= SPI_CR1_SPE; /* (2) */
A.19.6 SPI interrupt code example
if((SPI1->SR & SPI_SR_RXNE) == SPI_SR_RXNE)
{
SPI1_Data = (uint8_t)SPI1->DR; /* receive data, clear flag */
/* Process */
}
A.20 DBG code example
A.20.1 DBG read device Id code example
MCU_Id = DBGMCU->IDCODE; /* Read MCU Id, 32-bit access */
A.20.2 DBG debug in LPM code example
DBGMCU->CR |= DBGMCU_CR_DBG_STOP; /* To be able to debug in stop mode */

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