RM0367 Rev 7 51/1043
RM0367 List of figures
51
Figure 297. Receiving 0x8EAA33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900
Figure 298. I
2
S Philips standard (16-bit extended to 32-bit packet frame with CPOL = 0) . . . . . . . . . 900
Figure 299. Example of 16-bit data frame extended to 32-bit channel frame . . . . . . . . . . . . . . . . . . . 901
Figure 300. MSB Justified 16-bit or 32-bit full-accuracy length with CPOL = 0 . . . . . . . . . . . . . . . . . . 901
Figure 301. MSB justified 24-bit frame length with CPOL = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 901
Figure 302. MSB justified 16-bit extended to 32-bit packet frame with CPOL = 0 . . . . . . . . . . . . . . . . 902
Figure 303. LSB justified 16-bit or 32-bit full-accuracy with CPOL = 0 . . . . . . . . . . . . . . . . . . . . . . . . 902
Figure 304. LSB justified 24-bit frame length with CPOL = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 902
Figure 305. Operations required to transmit 0x3478AE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 903
Figure 306. Operations required to receive 0x3478AE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 903
Figure 307. LSB justified 16-bit extended to 32-bit packet frame with CPOL = 0 . . . . . . . . . . . . . . . . 903
Figure 308. Example of 16-bit data frame extended to 32-bit channel frame . . . . . . . . . . . . . . . . . . . 904
Figure 309. PCM standard waveforms (16-bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 904
Figure 310. PCM standard waveforms (16-bit extended to 32-bit packet frame). . . . . . . . . . . . . . . . . 904
Figure 311. Audio sampling frequency definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 905
Figure 312. I
2
S clock generator architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 905
Figure 313. USB peripheral block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 924
Figure 314. Packet buffer areas with examples of buffer description table locations . . . . . . . . . . . . . 928
Figure 315. Block diagram of STM32L0x3 MCU and Cortex
®
-M0+-level debug support . . . . . . . . . . 956
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