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ST STM32L0x3 - Page 765

ST STM32L0x3
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RM0367 Rev 7 765/1043
RM0367 Universal synchronous/asynchronous receiver transmitter (USART/UART)
872
• Communication control/error detection flags
• Parity control:
– Transmits parity bit
– Checks parity of received data byte
• Fourteen interrupt sources with flags
• Multiprocessor communications
The USART enters Mute mode if the address does not match.
• Wakeup from Mute mode (by idle line detection or address mark detection)
29.3 USART extended features
• LIN master synchronous break send capability and LIN slave break detection capability
– 13-bit break generation and 10/11-bit break detection when USART is hardware
configured for LIN
• IrDA SIR encoder decoder supporting 3/16 bit duration for normal mode
• Smartcard mode
– Supports the T=0 and T=1 asynchronous protocols for smartcards as defined in
the ISO/IEC 7816-3 standard
– 0.5 and 1.5 stop bits for smartcard operation
• Support for ModBus communication
– Timeout feature
– CR/LF character recognition

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