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RM0367 Rev 7 917/1043

RM0367 Serial peripheral interface/ inter-IC sound (SPI/I2S)

922

Bit 5 MODF: Mode fault

0: No mode fault occurred

1: Mode fault occurred

This flag is set by hardware and reset by a software sequence. Refer to Section 31.4 on

page 892 for the software sequence.

Note: This bit is not used in I

S mode

Bit 4 CRCERR: CRC error flag

0: CRC value received matches the SPI_RXCRCR value

1: CRC value received does not match the SPI_RXCRCR value

This flag is set by hardware and cleared by software writing 0.

Note: This bit is not used in I

S mode.

Bit 3 UDR: Underrun flag

0: No underrun occurred

1: Underrun occurred

This flag is set by hardware and reset by a software sequence. Refer to Section 31.6.8: I

error flags for the software sequence.

Note: This bit is not used in SPI mode.

Bit 2 CHSIDE: Channel side

0: Channel Left has to be transmitted or has been received

1: Channel Right has to be transmitted or has been received

Note: This bit is not used for SPI mode and is meaningless in PCM mode.

Bit 1 TXE: Transmit buffer empty

0: Tx buffer not empty

1: Tx buffer empty

Bit 0 RXNE: Receive buffer not empty

0: Rx buffer empty

1: Rx buffer not empty

ST STM32L0x3 User Manual

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