RM0367 Rev 7 1031/1043
RM0367 Revision history
1039
19-Feb-2016
4
(continued)
Inter-integrated circuit interface (I2C)
Added description of stretch mechanism that guarantees setup and
hold times in Section : I2C timings and SCDEL bit description in
Section 28.7.5: Timing register (I2C_TIMINGR).
Universal synchronous asynchronous receiver transmitter
(USART)
Replaced nCTS by CTS, nRTS by RTS and SCLK by CK.
Updated note related to RTO counter in Section : Block mode (T=1)
Changed tWUSTOP to tWUUSART in Section 29.5.5: Tolerance of
the USART receiver to clock deviation.
Updated Section 29.8.3: Control register 3 (USART_CR3) ‘ONEBIT’
bit 11 description adding a note. Updated RTOF bit definition in
Section 29.8.8: Interrupt and status register (USART_ISR).
Updated Section 29.5.10: USART LIN (local interconnection network)
mode. Added Section : Determining the maximum USART baud rate
allowing to wakeup correctly from Stop mode when the USART clock
source is the HSI clock.
Low-power UART (LPUART)
Replaced nCTS by CTS, nRTS by RTS and SCLK by CK.
Updated Section 30.4.4: LPUART baud rate generation.
Added Section 30.4.5: Tolerance of the LPUART receiver to clock
deviation and Section : Determining the maximum LPUART baud rate
allowing to wakeup correctly from Stop mode when the LPUART clock
source is the HSI clock.
Updated Table 147: Effect of low-power modes on the LPUART.
Removed TFQRX in Table 149: LPUART register map and reset
values.
SPI/I2S
Updated Figure 276, Figure 277, Figure 278 and Figure 279.
Updated and added notes below Figure 276, Figure 277 and Figure
278.
Added Section 31.3.4: Multi-master communication.
DEBUG
Updated SWDIO bidirectional management in Section 33.5.1: SWD
protocol introduction.
Updated Section 33.9.1: Debug support for low-power modes.
Updated Section 33.9.3: Debug MCU configuration register
(DBG_CR).
Added Table 167: REV-ID values in Section : DBG_IDCODE.
Table 181. Document revision history (continued)
Date Revision Changes
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