ARM ARM1176JZF-S User Manual

System Control Coprocessor
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 3-4
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Cache control and
configuration
Cache Type c0, Cache Type Register on page 3-21
Cache Operations c7, Cache operations on page 3-69
Data Cache Lockdown c9, Data and instruction cache lockdown registers on
page 3-87
Instruction Cache Lockdown c9, Data and instruction cache lockdown registers on
page 3-87
Cache Behavior Override c9, Cache Behavior Override Register on page 3-97
TCM control and
configuration
TCM Status c0, TCM Status Register on page 3-24
Data TCM Region c9, Data TCM Region Register on page 3-89
Instruction TCM Region c9, Instruction TCM Region Register on page 3-91
Data TCM Non-secure Access
Control
c9, Data TCM Non-secure Control Access Register on
page 3-93
Instruction TCM Non-secure Access
Control
c9, Instruction TCM Non-secure Control Access Register on
page 3-94
TCM Selection c9, TCM Selection Register on page 3-96
Cache Master
Va li d
Instruction Cache Master Valid c15, Instruction Cache Master Valid Register on page 3-147
Data Cache Master Valid c15, Data Cache Master Valid Register on page 3-148
DMA control DMA Identification and Status c11, DMA identification and status registers on page 3-106
DMA User Accessibility c11, DMA User Accessibility Register on page 3-107
DMA Channel Number c11, DMA Channel Number Register on page 3-109
DMA enable c11, DMA enable registers on page 3-110
DMA Control c11, DMA Control Register on page 3-112
DMA Internal Start Address c11, DMA Internal Start Address Register on page 3-114
DMA External Start Address c11, DMA External Start Address Register on page 3-115
DMA Internal End Address c11, DMA Internal End Address Register on page 3-116
DMA Channel Status c11, DMA Channel Status Register on page 3-117
DMA Context ID c11, DMA Context ID Register on page 3-120
System
performance
monitor
Performance Monitor Control c15, Performance Monitor Control Register on page 3-133
Cycle Counter c15, Cycle Counter Register on page 3-137
Count Register 0 c15, Count Register 0 on page 3-138
Count Register 1 c15, Count Register 1
on page 3-139
Table 3-1 System control coprocessor register functions (continued)
Function Register/operation Reference to description

ARM ARM1176JZF-S Specifications

General

Brand	ARM
Model	ARM1176JZF-S
Category	Computer Hardware
Language	English