ARM ARM1176JZF-S User Manual

Level Two Interface
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 8-16
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8.5.2 Noncacheable LDRB
Table 8-13 shows the values of ARADDRRW, ARBURSTRW, ARSIZERW, and
ARLENRW for Noncacheable LDRBs from bytes 0-7.
8.5.3 Noncacheable LDRH
Table 8-14 shows the values of ARADDRRW, ARBURSTRW, ARSIZERW, and
ARLENRW for Noncacheable LDRHs from bytes 0-7.
Table 8-13 Noncacheable LDRB
Address[4:0] ARADDRRW ARBURSTRW ARSIZERW ARLENRW
0x00 , byte 0 0x00 Incr 8-bit 1 data transfer
0x01 , byte 1 0x01 Incr 8-bit 1 data transfer
0x02 , byte 2 0x02 Incr 8-bit 1 data transfer
0x03 , byte 3 0x03 Incr 8-bit 1 data transfer
0x04 , byte 4 0x04 Incr 8-bit 1 data transfer
0x05 , byte 5 0x05 Incr 8-bit 1 data transfer
0x06 , byte 6 0x06 Incr 8-bit 1 data transfer
0x07 , byte 7 0x07 Incr 8-bit 1 data transfer
Table 8-14 Noncacheable LDRH
Address[4:0] ARADDRRW ARBURSTRW ARSIZERW ARLENRW
0x00 , byte 0 0x00 Incr 16-bit 1 data transfer
0x01 , byte 1 0x01 Incr 32-bit 1 data transfer
0x02 , byte 2 0x02 Incr 16-bit 1 data transfer
0x03 , byte 3 0x03 Incr 8-bit 1 data transfer
0x04 Incr 8-bit 1 data transfer
0x04 , byte 4 0x04 Incr 16-bit 1 data transfer
0x05 , byte 5 0x05 Incr 32-bit 1 data transfer
0x06 , byte 6 0x06 Incr 16-bit 1 data transfer
0x07 , byte 7 0x07 Incr 8-bit 1 data transfer
0x08 Incr 8-bit 1 data transfer

ARM ARM1176JZF-S Specifications

General

Brand	ARM
Model	ARM1176JZF-S
Category	Computer Hardware
Language	English