System Control Coprocessor
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 3-120
ID012310 Non-Confidential, Unrestricted Access
3.2.42 c11, DMA Context ID Register
The DMA Context ID Register for each channel contains the processor 32-bit Context ID of the
process that uses that channel.
The DMA Context ID Register is:
• in CP15 c11
• a 32-bit read/write register for each DMA channel common to Secure and Non-secure
worlds
• accessible in privileged modes only.
Figure 3-64 shows the arrangement of bits in the DMA Context ID Register.
Figure 3-64 DMA Context ID Register format
Table 3-119 lists how the bit values correspond with the DMA Context ID Register functions.
Access in the Non-secure world depends on the DMA bit, see c1, Non-Secure Access Control
Register on page 3-55. Table 3-120 lists the results of attempted access for each mode.
To access the DMA Context ID register in a privileged mode set the DMA Channel Number
Register to the appropriate DMA channel and read or write CP15 with:
• Opcode_1 set to 0
• CRn set to c11
• CRm set to c15
• Opcode_2 set to 0.
MRC p15, 0, <Rd>, c11, c15, 0 ; Read DMA Context ID Register
MCR p15, 0, <Rd>, c11, c15, 0 ; Write DMA Context ID Register
PROCID
31 8 7 0
ASID
Table 3-119 DMA Context ID Register bit functions
Bits Field name Function
[31:8] PROCID Extends the ASID to form the process ID and identify the current process
Holds the process ID value
[8:0] ASID Holds the ASID of the current process and identifies the current ASID
Holds the ASID value
Table 3-120 Results of access to the DMA Context ID Register
DMA bit
Secure Privileged Non-secure Privileged
User
Read Write Read Write
0 Data Data Undefined exception Undefined exception Undefined exception
1 Data Data Data Data Undefined exception
To Next Page
Loading...
