Level One Memory System
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 7-16
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7.6 Write buffer
All memory writes take place using the Write buffer. To ensure that the Write buffer is not
drained on reads, the following features are implemented:
• The Write buffer is a FIFO of outstanding writes to memory. It consists of a set of
addresses and a set of data words, together with their size information.
• If a sequence of data words is contained in the Write buffer, these are denoted as applying
to the same address by the Write buffer storing the size of the store multiple. This reduces
the number of address entries that must be stored in the Write buffer.
• In addition to this, a separate FIFO of Write-Back addresses and data words is
implemented. Having a separate structure avoids complications associated with
performing an external write while the write-though is being handled.
• The address of a new read access is compared against the addresses in the Write buffer. If
a read is to a location that is already in the Write buffer, the read is blocked until the Write
buffer has drained sufficiently far for that location to be no longer in the Write buffer. The
sequential marker only applies to words in the same 8 word, 8 word aligned, block, and
the address comparisons are based on 8 word aligned addresses.
Memory access control on page 6-11 describes the ordering of memory accesses.
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