System Control Coprocessor
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 3-20
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3.2.2 c0, Main ID Register
The purpose of the Main ID Register is to return the device ID code that contains information
about the processor.
The Main ID Register is:
•in CP15 c0
• a 32 bit read-only register common to the Secure and Non-secure worlds
• accessible in privileged modes only.
Figure 3-10 shows the arrangement of bits in the register.
Figure 3-10 Main ID Register format
The contents of the Main ID Register depend on the specific implementation. Table 3-4 lists
how the bit values correspond with the Main ID Register functions.
Note
If an Opcode_2 value corresponding to an unimplemented or reserved ID register with CRm
equal to c0 and Opcode_1 = 0 is encountered, the system control coprocessor returns the value
of the main ID register.
Table 3-5 lists the results of attempted access for each mode.
Variant
number
Implementor
31 24 23 20 19 16 15 4 3 0
Architecture Primary part number Revision
Table 3-4 Main ID Register bit functions
Bits Field name Function
[31:24] Implementor Indicates implementor, ARM Limited:
0x41
[23:20] Variant number The major revision number n in the rn part of the rnpn revision status.
0x0
[19:16] Architecture Indicates that the architecture is given in the CPUID registers:
0xF
[15:4] Primary part number Indicates part number, ARM1176JZF-S:
0xB76
[3:0] Revision The minor revision number n in the pn part of the rnpn revision status. For example:
for release r0p0:
0x0
for release r0p7:
0x7
Table 3-5 Results of access to the Main ID Register
Secure Privileged Non-secure Privileged
User
Read Write Read Write
Data Undefined exception Data Undefined exception Undefined exception
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