Memory Management Unit
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 6-49
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Figure 6-15 Large page table walk, backwards-compatible format
Using backwards-compatible format descriptors, the 64KB large page is generated by setting all
of the AP bit pairs to the same values, AP3=AP2=AP1=AP0. If any one of the pairs are different,
then the 64KB large page is converted into four 16KB large page subpages. The subpage access
permission bits are chosen using the virtual address bits [15:14].
Second-level small page table walk
If bits [1:0] of the second-level descriptor are b10 for backwards-compatible format, then a
small page table walk is required.
Figure 6-16 on page 6-50 shows the translation process for a 4KB small page or a 1KB small
page subpage using backwards-compatible format descriptors, AP bits enabled.
N
S
0
TEX
1
Coarse page table base address
31 1098 54 210
P Domain 0
First-level table index
31 20 19 12 11 0
Page index
Translation base
31 14 13 0
1
Page base address
31 1211109876543210
AP
3
AP
2
AP
1
AP
0
C B 0
0
Coarse page table base address
31 10 9 2 1 0
Second-level
table index
0
0
Translation base
31 14 13 0
First-level table index 0
21
Page index
Page base address
31 0
Second-level descriptor address
Second-level descriptor
Physical address
First-level descriptor
First-level descriptor address
Modified virtual address
Translation table base
16 15
1415
16 15
16
Second-level
table index
3
SBZ SBZ