Introduction
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 1-38
ID012310 Non-Confidential, Unrestricted Access
Saturated high 16 - low 16,
low 16 + high 16
QSUBADDX{cond} <Rd>, <Rn>, <Rm>
Signed high 16 - low 16,
low 16 + high 16, halved
SHSUBADDX{cond} <Rd>, <Rn>, <Rm>
Unsigned high 16 - low 16,
low 16 + high 16, set GE flags
USUBADDX{cond} <Rd>, <Rn>, <Rm>
Saturated unsigned
high 16 - low 16, low 16 + high 16
UQSUBADDX{cond} <Rd>, <Rn>, <Rm>
Unsigned high 16 - low 16,
low 16 + high 16, halved
UHSUBADDX{cond} <Rd>, <Rn>, <Rm>
Signed high 16-16, low 16-16,
set GE flags
SSUB16{cond} <Rd>, <Rn>, <Rm>
Saturated high 16 - 16, low 16 - 16
QSUB16{cond} <Rd>, <Rn>, <Rm>
Signed high 16 - 16, low 16 - 16,
halved
SHSUB16{cond} <Rd>, <Rn>, <Rm>
Unsigned high 16 - 16, low 16 - 16,
set GE flags
USUB16{cond} <Rd>, <Rn>, <Rm>
Saturated unsigned high 16 - 16,
low 16 - 16
UQSUB16{cond} <Rd>, <Rn>, <Rm>
Unsigned high 16 - 16, low 16 - 16,
halved
UHSUB16{cond} <Rd>, <Rn>, <Rm>
Four signed 8 + 8, set GE flags
SADD8{cond} <Rd>, <Rn>, <Rm>
Four saturated 8 + 8
QADD8{cond} <Rd>, <Rn>, <Rm>
Four signed 8 + 8, halved
SHADD8{cond} <Rd>, <Rn>, <Rm>
Four unsigned 8 + 8, set GE flags
UADD8{cond} <Rd>, <Rn>, <Rm>
Four saturated unsigned 8 + 8
UQADD8{cond} <Rd>, <Rn>, <Rm>
Four unsigned 8 + 8, halved
UHADD8{cond} <Rd>, <Rn>, <Rm>
Four signed 8 - 8, set GE flags
SSUB8{cond} <Rd>, <Rn>, <Rm>
Four saturated 8 - 8
QSUB8{cond} <Rd>, <Rn>, <Rm>
Four signed 8 - 8, halved
SHSUB8{cond} <Rd>, <Rn>, <Rm>
Four unsigned 8 - 8
USUB8{cond} <Rd>, <Rn>, <Rm>
Four saturated unsigned 8 - 8
UQSUB8{cond} <Rd>, <Rn>, <Rm>
Four unsigned 8 - 8, halved
UHSUB8{cond} <Rd>, <Rn>, <Rm>
Sum of absolute differences
USAD8{cond} <Rd>, <Rm>, <Rs>
Sum of absolute differences and
accumulate
USADA8{cond} <Rd>, <Rm>, <Rs>, <Rn>
Table 1-7 ARM instruction set summary (continued)
Operation Assembler