Memory Management Unit
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 6-26
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Prefetch Buffer is guaranteed to perform this function, while alternative methods of performing
the same task, such as a branch instruction, can be optimized in the hardware to avoid the
pipeline flush, for example, by using a branch predictor.
6.7.6 Backwards compatibility
The ARMv6 memory attributes are significantly different from those in previous versions of the
architecture. Table 6-10 lists the interpretation of the earlier memory types in the light of this
definition.
Table 6-10 Memory region backwards compatibility
Previous architectures ARMv6 attribute
NCNB, Noncacheable, Non
Bufferable
Strongly Ordered
NCB, Noncacheable, Bufferable Shared Device
Write-Through, Cacheable,
Bufferable
Non-Shared Normal, Write-Through
Cacheable
Write-Back, Cacheable, Bufferable Non-Shared Normal, Write-Back Cacheable
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