Debug
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 13-26
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13.5 CP14 debug instructions
Table 13-19 lists the CP14 debug instructions.
In Table 13-19,
MRC p14,0,<Rd>,c0,c5,0
and
STC p14,c5,<addressing mode>
refer to the rDTR
and
MCR p14,0,<Rd>,c0,c5,0
and
LDC p14,c5,<addressing mode>
refer to the wDTR. See CP14
c5, Data Transfer Registers (DTR) on page 13-11 for more details. The
MRC p14,0,R15,c0,c1,0
instruction sets the CPSR flags as follows:
• N flag = DSCR[31]. This is an Unpredictable value.
• Z flag = DSCR[30]. This is the value of the rDTRfull flag.
• C flag = DSCR[29]. This is the value of the wDTRfull flag.
• V flag = DSCR[28]. This is an Unpredictable value.
Table 13-19 CP14 debug instructions
Binary address
Register number Abbreviation Legal instructions
Opcode_2 CRm
b000 b0000 0 DIDR
MRC p14, 0, <Rd>, c0, c0, 0
a
b000 b0001 1 DSCR
MRC p14, 0, <Rd>, c0, c1,0
a
MRC p14, 0, R15, c0, c1,0
MCR p14, 0, <Rd>, c0, c1,0
a
b000 b0101 5 DTR (rDTR/wDTR)
MRC p14, 0, <Rd>, c0, c5, 0
a
MCR p14, 0, <Rd>, c0, c5, 0
a
STC p14, c5, <addressing mode>
LDC p14, c5, <addressing mode>
b000 b0110 6 WFAR
MRC p14, 0, <Rd>, c0, c6, 0
a
MCR p14, 0, <Rd>, c0, c6, 0
a
b000 b0111 7 VCR
MRC p14, 0, <Rd>, c0, c7, 0
a
MCR p14, 0, <Rd>, c0, c7, 0
a
b000 b1010 10 DSCCR
MRC p14, 0, <Rd>, c0, c10, 0
a
MCR p14, 0, <Rd>, c0, c10, 0
a
b000 b1011 11 DSMCR
MRC p14, 0, <Rd>, c0, c11, 0
a
MCR p14, 0, <Rd>, c0, c11, 0
a
b100 b0000-b1111 64-79 BVR
MRC p14, 0, <Rd>, c0, cy,4
ab
MCR p14, 0, <Rd>, c0, cy,4
ab
b101 b0000-b1111 80-95 BCR
MRC p14, 0, <Rd>, c0, cy,5
ab
MCR p14, 0, <Rd>, c0, cy,5
ab
b110 b0000-b1111 96-111 WVR
MRC p14, 0, <Rd>, 0, cy, 6
ab
MCR p14, 0, <Rd>, 0, cy, 6
ab
b111 b0000-b1111 112-127 WCR
MRC p14, 0, <Rd>, c0, cy, 7
ab
MCR p14, 0, <Rd>, c0, cy, 7
ab
a. <Rd> is any of R0-R14 ARM registers.
b. y is the decimal representation for the binary number CRm.
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