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ARM ARM1176JZF-S User Manual

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Unaligned and Mixed-endian Data Access Support
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 4-14
ID012310 Non-Confidential, Unrestricted Access
Note
It is a consequence of these definitions that if X is word-aligned, Word[X]
consists of the same four bytes of actual memory in the same order in the LE and
BE-32 endianness models.
Align(X) This means X AND
0xFFFFFFFC
. That is, X with its least significant two bits forced
to zero to make it word-aligned.
There is no difference between Addr and Align(Addr) on lines where Addr[1:0]
is set to b00. You can use this to simplify the control of when the least significant
bits are forced to zero.
For the Two-word and Multi-word access types, the Memory accessed column only specifies the
lowest word accessed. Subsequent words have addresses constructed by successively
incrementing the address of the lowest word by 4, and are constructed using the same endianness
model as the lowest word.
Table 4-3 Unalignment fault occurrence when access behavior is architecturally unpredictable
A U Addr[2:0]
Access
types
Architectural
Behavior
Memory accessed Note
0 0 - - - - Legacy, no alignment
0 0 bxxx Byte, BSync Normal Byte[Addr]
0 0 bxx0 Halfword Normal Halfword[Addr]
0 0 bxx1 Halfword Unpredictable - Halfword[Align16(Addr)];
Operation unaffected by Addr[0]
0 0 bxx0 HWSync Normal Halfword[Addr]
0 0 bxx1 HWSync Unpredictable - Halfword[Align16(Addr)];
Operation unaffected by Addr[0]
0 0 bxxx Wload Normal Word[Align32(Addr)] Loaded data rotated by
8*Addr[1:0] bits
0 0 bxxx WStore Normal Word[Align32(Addr)] Operation unaffected by
Addr[1:0]
0 0 bx00 WSync Normal Word[Addr]
0 0 bxx1, bx1x WSync Unpredictable - Word[Align32(Addr)]
0 0 bxxx Multi-word Normal Word[Align32(Addr)] Operation unaffected by
Addr[1:0]
0 0 b000 Two-word Normal Word[Addr]
0 0 bxx1,
bx1x, b1xx
Two-word Unpredictable - Same as LDM2 or STM2
0 0 b000 DWSync Normal Word[Addr]
0 0 bxx1,
bx1x,
b1xx
DWSync Unpredictable - DWord[Align64(Addr)];
Operation unaffected by
Addr[2:0]
0 1 - - - - ARMv6 unaligned support
0 1 bxxx Byte, BSync Normal Byte[Addr]

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ARM ARM1176JZF-S Specifications

General IconGeneral
BrandARM
ModelARM1176JZF-S
CategoryComputer Hardware
LanguageEnglish

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