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Memory Management Unit

ID012310 Non-Confidential, Unrestricted Access

6.6.2 Shared

This bit indicates that the memory region can be shared by multiple processors. For a full

explanation of the Shared attribute see Memory attributes and types on page 6-20.

6.6.3 NS attribute

The NS attribute is a TrustZone extension to the V6 MMU. It is specified in the L1 descriptors,

in position 19 for sections and supersections, and in position 3 for coarse pages. It defines if the

targeted memory region corresponding to the page is Secure or Non-secure, that is if this

memory region is accessed with Secure or with Non-secure rights. This bit is ignored in the

Non-secure world.

When the MMU is off, the NS Attribute is equal to the state, Secure or Non-secure, of the MMU

request.

When the NS Attribute is set to 1, the access is performed with Non-secure rights:

• If the access is cacheable, it can only hit a cache line whose NS-Tag is Non-secure. If this

access causes a linefill, then the created line in the cache has its NS Tag set to 1,

Non-secure.

• The access can only hit TCM configured as Non-secure.

• If the access goes external to the core, then it is marked as Non-secure with AxPROT[1]

= Non-secure.

The NS Attribute is specified in the L1 descriptors, in position 19 for sections and supersections,

and in position 3 for coarse pages. The bit contained in the NS descriptors is always ignored, so

that all NS entries in the TLB, that is entries with NSTID=1=Non-secure, have the NS

Attribute=1=Non-secure. This ensures that the NS world always perform accesses with NS

rights.

Note

This rule is also true when a new entry is created in the Lockdown region with the CP15

Read/Write PA in TLB Lockdown region operation. For this operation, when an entry is written

with NSTID=1, then the corresponding NS Attribute of the entry is forced to 1. See c15, TLB

lockdown access registers on page 3-149.

With this mechanism, only the Secure world can perform Secure accesses, and consequently is

the only one permitted to access Secure memory. The Secure world can also access Non-secure

memory, by setting the NS Attribute appropriately in the corresponding descriptor. The

Non-secure world can only access Non-secure memory.

There is no check of the NS Attribute internally, and therefore the system can not generate an

error because of a wrong NS Attribute. Only external aborts can be generated, if the system has

implemented this feature.

ARM ARM1176JZF-S User Manual

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