Debug Test Access Port
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 14-40
ID012310 Non-Confidential, Unrestricted Access
14.9 Programming debug events
This section describes the following operations:
• Reading registers using scan chain 7
• Writing registers using scan chain 7
• Setting breakpoints, watchpoints and vector traps
• Setting software breakpoints on page 14-41.
14.9.1 Reading registers using scan chain 7
A typical sequence for reading registers using scan chain 7 is as follows:
SCAN_N 7 ; select ITR
EXTEST
REQ 1stAddr2Rd0 0 ;read request for register 1stAddr2read
FOR(i=2; i <= Words2Read; i++) DO
LOOP
REQ ithAddr2Rd 0 0 Ready readData
; ith read request while waiting
UNTIL Ready==1 ; wait until the previous request completes
Save value in readData
ENDFOR
LOOP
REQ 0 0 0 Ready readData ; null request while waiting
UNTIL Ready==1 ; wait until last request completes
Save value in readData
14.9.2 Writing registers using scan chain 7
A typical sequence for writing to a register using scan chain 7 is as follows:
SCAN_N 7 ; select ITR
EXTEST
REQ 1stAddr2Wr 1stData2Wr 0b1 ; write request for register 1stAddr2write
FOR(i=2; i <= Words2Write; i++) DO
LOOP
REQ ithAddr2Wr ithData2Wr 1 Ready
; ith write request while waiting
UNTIL Ready==1 ; wait until the previous request completes
ENDFOR
LOOP
REQ 0 0 0 Ready ; null request while waiting
UNTIL Ready==1 ; wait until last request completes
14.9.3 Setting breakpoints, watchpoints and vector traps
You can program a vector catch debug event by writing to CP14 debug vector catch register.
You can program a breakpoint debug event by writing to CP14 debug 64-69 breakpoint value
registers and CP14 debug 80-84 breakpoint control registers.
You can program a watchpoint debug event by writing to CP14 debug 96-97 watchpoint value
registers and CP14 debug 112-113 watchpoint control registers.
Note
An External Debugger can access the CP14 debug registers whether the processor is in Debug
state or not, so these debug events can be programmed on-the-fly, while the processor is in
ARM/Thumb/Jazelle state.
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