Memory Management Unit
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 6-11
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6.5 Memory access control
Access to a memory region is controlled by:
• Domains
• Access permissions
• Execute never bits in the TLB entry on page 6-12.
6.5.1 Domains
A domain is a collection of memory regions. In compliance with the ARM Architecture and the
TrustZone Security Extensions, the ARM1176JZF-S supports 16 Domains in the Secure world
and 16 Domains in the Non-secure world. Domains provide support for multi-user operating
systems. All regions of memory have an associated domain.
A domain is the primary access control mechanism for a region of memory and defines the
conditions when an access can proceed. The domain determines whether:
• access permissions are used to qualify the access
• access is unconditionally permitted to proceed
• access is unconditionally aborted.
In the latter two cases, the access permission attributes are ignored.
Each page table entry and TLB entry contains a field that specifies the domain that the entry is
in. Access to each domain is controlled by a 2-bit field in the Domain Access Control Register,
CP15 c3. Each field enables very quick access to be achieved to an entire domain, so that whole
memory areas can be efficiently swapped in and out of virtual memory. Two kinds of domain
access are supported:
Clients Clients are users of domains in that they execute programs and access data. They
are guarded by the access permissions of the TLB entries for that domain.
A client is a domain user, and each access has to be checked against the access
permission settings for each memory block and the system protection bit, the S
bit, and the ROM protection bit, the R bit, in CP15 Control Register c1. Table 6-1
on page 6-12 lists the access permissions.
Managers Managers control the behavior of the domain, the current sections and pages in
the domain, and the domain access. They are not guarded by the access
permissions for TLB entries in that domain.
Because a manager controls the domain behavior, each access has only to be
checked to be a manager of the domain.
One program can be a client of some domains, and a manager of some other domains, and have
no access to the remaining domains. This enables flexible memory protection for programs that
access different memory resources.
6.5.2 Access permissions
The access permission bits control access to the corresponding memory region. If an access is
made to an area of memory without the required permissions, then a permission fault is raised.
The access permissions are determined by a combination of the AP and APX bits in the page
table, and the S and R bits in CP15 Control Register c1. For page tables not supporting the APX
bit, the value 0 is used.
You do not have to flush the TLB to enable the new S and R bit to take effect. Access
permissions of entries in the TLB are automatically affected by the new S and R values.
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