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ARM ARM1176JZF-S User Manual

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System Control Coprocessor
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 3-129
ID012310 Non-Confidential, Unrestricted Access
MCR p15, 0, <Rd>, c13, c0, 1 ;Write Context ID Register
You must ensure that software performs a Data Synchronization Barrier operation before
changes to this register. This ensures that all accesses are related to the correct context ID.
You must execute an IMB instruction immediately after changes to the Context ID Register. You
must not attempt to execute any instructions that are from an ASID-dependent memory region
between the change to the register and the IMB instruction. Code that updates the ASID must
execute from a global memory region.
You must program each process with a unique number to ensure that ETM and debug logic can
correctly distinguish between processes.
3.2.48 c13, Thread and process ID registers
The purpose of the thread and process ID registers is to provide locations to store the IDs of
software threads and processes for OS management purposes.
The thread and process ID registers are:
in CP15 c13
three 32-bit read/write registers banked for Secure and Non-secure worlds:
User Read/Write Thread and Process ID Register
User Read Only Thread and Process ID Register
Privileged Only Thread and Process ID Register.
each accessible in different modes:
User Read/Write: read/write in User and privileged modes
User Read Only: read only in User mode, read/write in privileged modes
Privileged Only: read/write in privileged modes only.
Table 3-131 lists the results of attempted access to each register for each mode.
To use the thread and process ID registers read or write CP15 with:
Opcode_1 set to 0
CRn set to c13
CRm set to c0
Table 3-131 Results of access to the thread and process ID registers
Thread
and
Process
ID
Register
Secure
Privileged
Non-secure Privileged Secure User Non-secure User
Read Write Read Write Read Write Read Write
User
Read/
Write
a
Secure
data
Secure
data
Non-secure
data
Non-secure
data
Secure
data
Secure
data
Non-secure
data
Non-secure
data
User Read
Only
a
Secure
data
Secure
data
Non-secure
data
Non-secure
data
Secure
data
Undefined
exception
Non-secure
data
Undefined
exception
Privileged
Only
a
Secure
data
Secure
data
Non-secure
data
Non-secure
data
Undefined
exception
Undefined
exception
Undefined
exception
Undefined
exception
a. The register names are:
- User Read/Write Thread and Process ID Register
- User Read Only Thread and Process ID Register
- Privileged Only Thread and Process ID Register.

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ARM ARM1176JZF-S Specifications

General IconGeneral
BrandARM
ModelARM1176JZF-S
CategoryComputer Hardware
LanguageEnglish

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