System Control Coprocessor
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 3-80
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• VA to PA translation in the current world on page 3-82
• VA to PA translation in the other world on page 3-83.
PA Register
The purpose of the PA Register is to hold:
• the PA after a successful translation
• the source of the abort for an unsuccessful translation.
Table 3-77 lists the purpose of the bits of the PA Register for successful translations and
Table 3-78 on page 3-81 lists the purpose of the bits of the PA Register for unsuccessful
translations.
The PA Register is:
•in CP15 c7
• a 32 bit read/write register banked in Secure and Non-secure worlds
• accessible in privileged modes only.
Figure 3-45 shows the format of the PA Register for successful translations.
Figure 3-45 PA Register format for successful translation
Figure 3-46 shows the format of the PA register for aborted translations.
Figure 3-46 PA Register format for aborted translation
Table 3-77 lists the functional bits of the PA Register for successful translation.
0PA
31 109876543210
N
S
P
S
H
-
OUTERINNER
1UNP / SBZ
31 6710
FSR[12,10,3:0]
Table 3-77 PA Register for successful translation bit functions
Bits Field name Function
[31:10] PA PA Translated physical address.
[9] NS Indicates the state of the NS Attribute bit in the page table:
0 = Secure memory
1 = Non-secure memory.
[8] P Not used in the ARM1176JZF-S processor.
UNP/SBZ.
[7] SH Indicates shareable memory:
0 = Non-shared
1 = Shared.
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