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ARM ARM1176JZF-S - Memory Formats; Figure 2-4 Big-Endian Addresses of Bytes Within Words; Figure 2-5 Little-Endian Addresses of Bytes Within Words

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ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 2-15
ID012310 Non-Confidential, Unrestricted Access
2.6 Memory formats
The processor views memory as a linear collection of bytes numbered in ascending order from
zero. Bytes 0-3 hold the first stored word, and bytes 4-7 hold the second stored word, for
example.
The processor can treat words in memory as being stored in either:
Legacy big-endian format
Little-endian format.
Additionally, the processor supports mixed-endian and unaligned data accesses. For details see
Chapter 4 Unaligned and Mixed-endian Data Access Support.
2.6.1 Legacy big-endian format
In legacy big-endian format, the processor stores the most significant byte of a word at the
lowest-numbered byte, and the least significant byte at the highest-numbered byte. Therefore,
byte 0 of the memory system connects to data lines 31-24. Figure 2-4 shows this.
Figure 2-4 Big-endian addresses of bytes within words
2.6.2 Little-endian format
In little-endian format, the lowest-numbered byte in a word is the least significant byte of the
word and the highest-numbered byte is the most significant. Therefore, byte 0 of the memory
system connects to data lines 7-0. Figure 2-5 shows this.
Figure 2-5 Little-endian addresses of bytes within words
31 24 23 16 15 8 7 Word address0
4
0
8Higher address
Lower address
Most significant byte is at lowest address
Word is addressed by byte address of most significant byte
Bit
111098
7654
3210
31 24 23 16 15 8 7 Word address0
4
0
8Higher address
Lower address
Least significant byte is at lowest address
Word is addressed by byte address of least significant byte
Bit
891011
4567
0123

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