Programmer’s Model
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 2-19
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Banked registers have a mode identifier that indicates the mode that they relate to. Table 2-5 lists
these mode identifiers.
FIQ mode has seven banked registers mapped to R8–R14 (R8_fiq–R14_fiq). As a result many
FIQ handlers do not have to save any registers.
The Secure Monitor, Supervisor, Abort, IRQ, and Undefined modes each have alternative
mode-specific registers mapped to R13 and R14, permitting a private stack pointer and link
register for each mode.
Figure 2-6 on page 2-20 shows the ARM state registers.
Table 2-5 Register mode identifiers
Mode Mode identifier
User
usr
a
a. The
usr
identifier is usually omitted from
register names. It is only used in descriptions
where the User or System mode register is
specifically accessed from another operating
mode.
Fast interrupt fiq
Interrupt irq
Supervisor svc
Abort abt
System
usr
a
Undefined und
Secure Monitor mon
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