ARM ARM1176JZF-S User Manual

Level Two Interface
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 8-37
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8.6 Peripheral Interface transfers
The tables in this section describe the Peripheral Interface behavior for reads and writes for the
following interface signals:
• AxADDRP[31:0]
• AxBURSTP[1:0]
• AxSIZEP[2:0]
• AxLENP[3:0]
• WSTRBP[3:0], for write accesses.
See the AMBA AXI Protocol Specification for details of the other AXI signals.
Table 8-70 shows the values of AxADDRP, AxBURSTP, AxSIZEP, AxLENP, and WSTRBP
for example Peripheral Interface reads and writes.
The peripheral port can only do incrementing bursts of 2 data transfers maximum. It does not
support unaligned accesses.
Table 8-70 Example Peripheral Interface reads and writes
Example transfer, read or write AxADDRP AxBURSTP AxSIZEP AxLENP WSTRBP
Words 0-7
0x00 Incr 32-bit 2 data transfers b1111
0x04 b1111
0x08 Incr 32-bit 2 data transfers b1111
0x0C b1111
0x10 Incr 32-bit 2 data transfers b1111
0x14 b1111
0x18 Incr 32-bit 2 data transfers b1111
0x1C b1111
Words 0-3
0x00 Incr 32-bit 2 data transfers b1111
0x04 b1111
0x08 Incr 32-bit b1111
0x0C b1111
Words 0-2
0x00 Incr 32-bit 2 data transfers b1111
0x04 b1111
0x08 Incr 32-bit 1 data transfer b1111
Words 0-1
0x00 Incr 32-bit 2 data transfers b1111
0x04 b1111
Word 2
0x08 Incr 32-bit 1 data transfer b1111
Word 0, bytes 0 and 1
0x00 Incr 16-bit 1 data transfer b0011
Word 1, bytes 2 and 3
0x06 Incr 16-bit 1 data transfer b1100
Word 2, byte 3
0x0B Incr 8-bit 1 data transfer b1000

ARM ARM1176JZF-S Specifications

General

Brand	ARM
Model	ARM1176JZF-S
Category	Computer Hardware
Language	English