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ARM ARM1176JZF-S User Manual

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VFP Exception Handling
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 22-20
ID012310 Non-Confidential, Unrestricted Access
22.12 Arithmetic exceptions
This section describes the conditions under which the VFP11 coprocessor bounces an arithmetic
instruction based on the potential for the exception. It is the task of the support code to determine
the actual exception status of the instruction. The support code must return either the result and
appropriate exception status bits, or the intermediate result and a call to a user trap handler.
The following sections describe the circumstances when arithmetic exceptions occur:
FADD and FSUB
FCMP, FCMPZ, FCMPE, and FCMPEZ on page 22-21
FMUL and FNMUL on page 22-22
FMAC, FMSC, FNMAC, and FNMSC on page 22-22
FDIV on page 22-23
FSQRT on page 22-23
FCPY, FABS, and FNEG on page 22-24
FCVTDS and FCVTSD on page 22-24
FUITO and FSITO on page 22-24
FTOUI, FTOUIZ, FTOSI, and FTOSIZ on page 22-24.
22.12.1 FADD and FSUB
In an addition or subtraction, the exponent is initially the larger of the two input exponents. For
clarity, we define the operation as a Like-Signed Addition (LSA) or an Unlike-Signed Addition
(USA). Table 22-7 specifies how this distinction is made. In the table, + indicates a positive
operand, and – indicates a negative operand.
Because it is possible for an LSA operation to cause the exponent to be incremented if the
significand overflows, overflow bounce ranges for an LSA are more pessimistic than they are
for a USA. The LSA ranges are made slightly more pessimistic to incorporate FMAC
instructions. See FMAC, FMSC, FNMAC, and FNMSC on page 22-22.
Underflow bounce ranges for a USA are more pessimistic than they are for an LSA. This is to
accommodate a massive cancellation when the result exponent is smaller than the larger operand
exponent by as much as the length of the significand. The overflow range for a USA is slightly
Table 22-7 LSA and USA determination
Instruction Operand A sign Operand B sign Operation type
FADD++LSA
FADD + USA
FADD + USA
FADD––LSA
FSUB + + USA
FSUB + LSA
FSUB + LSA
FSUB USA

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ARM ARM1176JZF-S Specifications

General IconGeneral
BrandARM
ModelARM1176JZF-S
CategoryComputer Hardware
LanguageEnglish

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