ARM ARM1176JZF-S User Manual

Introduction
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 1-8
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1.5 Components of the processor
The main components of the ARM1176JZF-S processor are:
• Integer core
• Load Store Unit (LSU) on page 1-11
• Prefetch unit on page 1-11
• Memory system on page 1-12
• AMBA AXI interface on page 1-16
• Coprocessor interface on page 1-17
• Debug on page 1-17
• Instruction cycle summary and interlocks on page 1-19
• Vector Floating-Point (VFP) on page 1-19
• System control on page 1-21
• Interrupt handling on page 1-21.
Figure 1-1 shows the structure of the ARM1176JZF-S processor.
Figure 1-1 ARM1176JZF-S processor block diagram
1.5.1 Integer core
The ARM1176JZF-S processor is built around the ARM11 integer core. It is an implementation
of the ARMv6 architecture, that runs the ARM, Thumb, and Java instruction sets. The processor
contains EmbeddedICE-RT
™
logic and a JTAG debug interface to enable hardware debuggers to
communicate with the processor. The following sections describe the core in more detail:
• Instruction set categories on page 1-9
• Conditional execution on page 1-9
ARM1176JZF-S
L2 instruction
interface
Vector Floating
Point Coprocessor
Instruction
Cache
ETM interface
Memory
management
unit
Load Store
Unit
Data
Cache
Prefetch
Unit
Integer
core
L1 data side
controller
Power
control
L2 data
interface
L2 DMA
interface
Peripheral
port
JTAG interface
Coprocessor
interface
VIC interface
Data
TCM
Instruction
TCM
L1 instruction
side controller
System
metrics

ARM ARM1176JZF-S Specifications

General

Brand	ARM
Model	ARM1176JZF-S
Category	Computer Hardware
Language	English