Debug Test Access Port
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 14-3
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14.2 Synchronizing RealView ICE
The system and test clocks are synchronized internally to the macrocell. The ARM RealView
ICE debug agent directly supports one or more cores within an ASIC design. The off-chip
device, for example, RealView ICE, issues a TCK signal and waits for the RTCK, Returned
TCK, signal to come back. Synchronization is maintained because the off-chip device does not
progress to the next TCK edge until after an RTCK edge is received. Figure 14-2 shows this
synchronization.
Figure 14-2 RealView ICE clock synchronization
Note
All of the D type flip-flops are reset by DBGnTRST.
DQ DQ DQ DQ
TMS
TDI
CLKIN
Input sample and hold
RTCK
nTRST
ARM1176JZ-S core
RealView
ICE
CLKIN
TCK
CLKIN
RealView ICE
interface pads
JTAGSYNCBYPASS
0
1
0
1
DBGTDI
DBGTMS
TDI
0
1
DBGTCKEN
DQ
EN
DQ
EN
TMS
TCK
TDO
DBGnTRST
DBGnTDOEN
DBGTDO
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