The VFP Register File
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19.4 Loading operands from ARM11 registers
Floating-point data can be transferred between ARM11 registers and VFP11 registers using the
MCR, MRC, MCRR, and MRRC coprocessor data transfer instructions. No exceptions are
possible on these transfer instructions.
MCR instructions transfer 32-bit values from ARM11 registers to VFP11 registers as Table 19-1
lists.
MRC instructions transfer 32-bit values from VFP11 registers to ARM11 registers as Table 19-2
lists.
MCRR instructions transfer 64-bit quantities from ARM11 registers to VFP11 registers as
Table 19-3 lists.
MRRC instructions transfer 64-bit quantities from VFP11 registers to ARM11 registers as
Table 19-4 on page 19-7 lists.
Table 19-1 VFP11 MCR instructions
Instruction Operation Description
FMXR VFP11 system register = Rd
Move from ARM11 register Rd to VFP11 system register FPSID
a
,
FPSCR, FPEXC, FPINST, or FPINST2.
FMDLR Dn[31:0] = Rd Move from ARM11 register Rd to lower half of VFP11 double-precision
register Dn.
FMDHR Dn[63:32] = Rd Move from ARM11 register Rd to upper half of VFP11 double-precision
register Dn.
FMSR Sn = Rd Move from ARM11 register Rd to VFP11 single-precision or integer
register Sn.
a. Writing to the FPSID register does not change the contents of the FPSID but might be used as a serializing instruction.
Table 19-2 VFP11 MRC instructions
Instruction Operation Description
FMRX Rd = VFP11 system register Move from VFP11 system register FPSID, FPSCR, FPEXC, FPINST, or
FPINST2 to ARM11 register Rd.
FMRDL Rd = Dn[31:0] Move from lower half of VFP11 double-precision register Dn to ARM11
register Rd.
FMRDH Rd = Dn[63:32] Move from upper half of VFP11 double-precision register Dn to ARM11
register Rd.
FMRS Rd = Sn Move from VFP11 single-precision or integer register Sn to ARM11
register Rd.
Table 19-3 VFP11 MCRR instructions
Instruction Operation Description
FMDRR Dm[31:0] = Rd
Dm[63:32] = Rn
Move from ARM11 registers Rd and Rn to lower and upper halves of VFP11
double-precision register Dm.
FMSRR Sm = Rd
S(m + 1) = Rn
Move from ARM11 registers Rd and Rn to consecutive VFP11 single-precision
registers Sm and S(m + 1).
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