Clocking and Resets
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 9-11
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9.4.3 Processor reset
A processor or warm reset initializes the majority of the ARM1176JZF-S processor, excluding
the ARM1176JZF-S DBGTAP controller and the EmbeddedICE-RT logic. Processor reset is
typically used for resetting a system that has been operating for some time, for example,
watchdog reset.
Because the nRESETIN signal is synchronized within the processor, you do not have to
synchronize this signal.
9.4.4 DBGTAP reset
DBGTAP reset initializes the state of the processor DBGTAP controller. DBGTAP reset is
typically used by the RealView ICE module for hot connection of a debugger to a system.
DBGTAP reset enables initialization of the DBGTAP controller without affecting the normal
operation of the processor.
Because the DBGnTRST signal is synchronized within the processor, you do not have to
synchronize this signal.
9.4.5 Normal operation
During normal operation, neither processor reset nor power-on reset is asserted. If the DBGTAP
port is not being used, the value of DBGnTRST does not matter.
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