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ARM ARM1176JZF-S User Manual

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Coprocessor Interface
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 11-13
ID012310 Non-Confidential, Unrestricted Access
The instruction queue feeds the issue stage of the coprocessor pipeline, providing a new input
to the pipeline, in the form of a decoded instruction and its associated tag, whenever the queue
is not empty.
11.4.2 Length queue
When a coprocessor has decoded an instruction it knows how long a vectored load/store
operation is. This information is sent with the synchronizing token down the length queue, as
the relevant instruction leaves the instruction queue to enter the issue stage of the pipeline. The
length queue is maintained by the core and the coprocessor communicates with the queue using
the following signals:
CPALENGTH[3:0]
This is the length of a vectored data transfer to or from the coprocessor. It is
determined by the decoder in the instruction queue and asserted as the decoded
instruction moves into the issue stage. If the current instruction does not represent
a vectored data transfer, the length value is set to zero.
CPALENGTHT[3:0]
This is the tag associated with the instruction leaving the instruction queue, and
is copied from the queue buffer supplying the instruction.
CPALENGTHHOLD
This is deasserted when the instruction queue is providing valid information to the
core length queue. Otherwise, the signal is asserted to indicate that no valid data
are available.
11.4.3 Accept queue
The coprocessor must decide in the issue stage if it can accept an otherwise valid coprocessor
instruction. It passes this information with the synchronizing token down the accept queue, as
the relevant instruction passes from the issue stage to Ex1.
If an instruction cannot be accepted by the coprocessor it is said to have been bounced. If the
coprocessor bounces an instruction it does not remove the instruction from its pipeline, but
converts it to a phantom. This is explained in more detail in Bounce operations on page 11-19.
The accept queue is maintained by the core and the coprocessor communicates with the queue
using the following signals, that are all driven by the coprocessor:
CPAACCEPT
This is set to indicate that the instruction leaving the coprocessor issue stage has
been accepted.
CPAACCEPTT[3:0]
This is the tag associated with the instruction leaving the issue stage.
CPAACCEPTHOLD
This is deasserted when the issue stage is passing an instruction on to the Ex1
stage, whether it has been accepted or not. Otherwise, the signal is asserted to
indicate that no valid data are available.

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ARM ARM1176JZF-S Specifications

General IconGeneral
BrandARM
ModelARM1176JZF-S
CategoryComputer Hardware
LanguageEnglish

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