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ARM ARM1176JZF-S User Manual

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Debug Test Access Port
ARM DDI 0301H Copyright © 2004-2009 ARM Limited. All rights reserved. 14-24
ID012310 Non-Confidential, Unrestricted Access
Some flags and control bits at CP14 debug register c1, DSCR:
DSCR[12] User mode access to DCC disable bit. If this bit is set, only
privileged software can access the DCC. That is, access the DSCR
and the DTR.
DSCR[29] The wDTRfull flag. When clear, this flag indicates to the core that
the wDTR is ready to receive data from the core.
DSCR[30] The rDTRfull flag. When set, this flag indicates to the core that there
is data available to read at the DTR.
At the DBGTAP side, the resources are the following:
Scan chain 5. See Scan chain 5 on page 14-15. The only part of this scan chain that it is
not used for the DCC is the Ready flag. The rest of the scan chain is to be used in the
following way:
rDTR When the DBGTAPSM goes through the Update-DR state with
EXTEST and scan chain 5 selected, and the nRetry flag set, the
contents of the Data field are loaded into the rDTR. This is how the
DBGTAP debugger sends data to the software running on the core.
wDTR When the DBGTAPSM goes through the Capture-DR state with
INTEST and scan chain 5 selected, the contents of the wDTR are
loaded into the Data field of the scan chain. This is how the
DBGTAP debugger reads the data sent by the software running on
the core.
Valid flag When set, this flag indicates to the DBGTAP debugger that the
contents of the wDTR that it captured a short time ago are valid.
nRetry flag When set, this flag indicates to the DBGTAP debugger that the
scanned-in Data field has been successfully written into the rDTR at
the Update-DR state.
14.7.6 Target to host debug communications channel sequence
The DBGTAP debugger can use the following sequence for receiving data from the core:
1. Scan_N into the IR.
2. 5 into the SCREG.
3. INTEST into the IR.
4. Scan out 34 bits of data. If the Valid flag is clear, repeat this step again.
5. The least significant 32 bits hold valid data.
6. Go to step 4 again to read out more data.
14.7.7 Host to target debug communications channel
The DBGTAP debugger can use the following sequence for sending data to the core:
1. Scan_N into the IR.
2. 5 into the SCREG.
3. EXTEST into the IR.
4. Scan in 34 bits, the least significant 32 holding the word to be sent. At the same time, 34
bits were scanned out. If the nRetry flag is clear, repeat this step again.

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ARM ARM1176JZF-S Specifications

General IconGeneral
BrandARM
ModelARM1176JZF-S
CategoryComputer Hardware
LanguageEnglish

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