Debug
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When debugging in Monitor debug-mode, you can program new debug events through CP14.
This coprocessor is the software interface of all the debug resources such as the breakpoint and
watchpoint registers. See CP14 c1, Debug Status and Control Register (DSCR) on page 13-7 to
learn how to set the processor debug unit into Monitor debug-mode.
Note
Monitor debug-mode, used for debugging, is not the same as Secure Monitor mode.
13.2.3 Secure Monitor mode and debug
Debug can be restricted to one of three levels, Non-secure only, Non-secure and Secure User
only, or any Secure or Non-secure levels so that you can prevent access to Secure parts of the
system while still permitting Non-secure and optionally Secure User parts to be debugged. This
is controlled by the SPIDEN and SPNIDEN signals and the two bits SUIDEN and SUNIDEN
in the Secure Debug Enable Register in the system control coprocessor, see External debug
interface on page 13-28 and c1, Secure Debug Enable Register on page 3-54.
Invasive debug
Invasive debug is debug where the system can be both observed and controlled
like all of the debug in this section that enables you to halt the processor and
examine and modify registers and memory.
SPIDEN and SUIDEN control invasive debug permissions.
Non-invasive debug
Non-invasive is debug where the system can only be observed but not affected.
The ETM interface, the System Performance Monitor and the DBGTAP program
counter sample register provide non-invasive debug.
SPNIDEN and SUNIDEN control non-invasive debug permissions.
13.2.4 Virtual addresses and debug
Unless otherwise stated, all addresses in this chapter are Modified Virtual Addresses (MVA) as
the ARM Architecture Reference Manual describes. For example, the Breakpoint Value
Registers (BVR) and Watchpoint Value Registers (WVR) must be programmed with MVAs.
The terms Instruction Modified Virtual Address (IMVA) and Data Modified Virtual Address
(DMVA), where used, mean the MVA corresponding to an instruction address and the MVA
corresponding to a data address respectively.
13.2.5 Programming the debug unit
The processor debug unit is programmed using CoProcessor 14 (CP14). CP14 provides:
• instruction address comparators for triggering breakpoints
• data address comparators for triggering watchpoints
• a bidirectional Debug Communication Channel (DCC)
• all other state information associated with processor debug.
CP14 is accessed using coprocessor instructions in Monitor debug-mode, and certain debug
scan chains in Debug state, see Chapter 14 Debug Test Access Port to learn how to access the
processor debug unit using scan chains.
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