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Maxim Integrated MAX32665 - Table 4-71: Error Correction Coding Address Register; Table 4-72: Bluetooth LDO Control Register

Maxim Integrated MAX32665
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MAX32665-MAX32668 User Guide
Maxim Integrated Page 110 of 457
Table 4-71: Error Correction Coding Address Register
Error Correction Coding Address
GCR_ECC_ERRAD
[0x0070]
Bits
Field
Access
Reset
Description
31
tagramerr
RO
0
ECC Error Address/TAG RAM Error
Data depends on which block has reported the error. If sysram, fl0, or fl1, then
this bit(s) represents the bit(s) of the AMBA address of read which produced the
error. If the error is from one of the caches, then this bit is set as shown below:
0: No error
1: Tag_Error. The error is in the TAG RAM
30
tagrambank
RO
0
ECC Error Address/TAG RAM Error Bank
Data depends on which block has reported the error. If sysram, fl0, or fl1, then
this bit(s) represents the bit(s) of the AMBA address of read which produced the
error. If the error is from one of the caches, then this bit is set as shown below:
0: Error is in TAG RAM Bank 0
1: Error is in TAG RAM Bank 1
29:16
tagramaddr
RO
0
ECC Error Address/TAG RAM Error Address
Data depends on which block has reported the error. If sysram, fl0, or fl1, then
this bit(s) represents the bit(s) of the AMBA address of read which produced the
error. If the error is from one of the caches, then this bit is set as shown below:
[TAG ADDRESS]: Represents the TAG RAM Address
15
dataramerr
RO
0
ECC Error Address/DATA RAM Error Address
Data depends on which block has reported the error. If sysram, fl0, or fl1, then
this bit(s) represents the bit(s) of the AMBA address of read which produced the
error. If the error is from one of the caches, then this bit is set as shown below:
0: No error
1: DATA RAM Error. The error is in the Data RAM
14
datarambank
RO
0
ECC Error Address/DATA RAM Error Bank
Data depends on which block has reported the error. If sysram, fl0, or fl1, then
this bit(s) represents the bit(s) of the AMBA address of read which produced the
error. If the error is from one of the caches, then this bit is set as shown below:
0: Error is in DATA RAM Bank 0
1: Error is in DATA RAM Bank 1
13:0
dataramaddr
RO
0
ECC Error Address/TAG RAM Error Address
Data depends on which block has reported the error. If sysram, fl0, or fl1, then
this bit(s) represents the bit(s) of the AMBA address of read which produced the
error. If the error is from one of the caches, then this bit is set as shown below:
[DATA ADDRESS]: Represents the DATA RAM Error Address
Table 4-72: Bluetooth LDO Control Register
Bluetooth LDO Control
GCR_BTLE_LDOCR
[0x0074]
Bits
Field
Access
Reset
Description
31:16
-
RO
0
Reserved
Do not modify this field.
15
ldotxbypenendly
R
0
LDOTX Bypass Enable Delay
Not used
14
ldorxbypenendly
R
0
LDORX Bypass Enable Delay
Not used.
13
ldorxendly
R
0
LDORX Enable Delay
Not used.

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