EasyManuals Logo

Maxim Integrated MAX32665 User Manual

Maxim Integrated MAX32665
457 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #168 background imageLoading...
Page #168 background image
MAX32665-MAX32668 User Guide
Maxim Integrated Page 168 of 457
Figure 8-6. Simplified SPIXR Block Diagram
I D
ARM
®
Cortex
®
-M4
CPU1
AHB AHB SYSTEM B US
EXTERNAL
SPI-XIP FLA SH
ARM
®
Cortex
®
-M4
CPU0
I D
GCR_SCON
dcache _dis
SPIXR CACHE
BYPAS S
SPIXR
INTERFACE
SPIXR CACHE
CONTROLLER (SRCC)
LINE BUFFER
16KB EXTERNAL
SPI RAM MEMORY
CACHE
8.3.1 SPIXR Master Controller Registers
See Table 3-1: APB Peripheral Base Address Map for the SPIXR Peripheral Base Address
Table 8-24. SPIXR Master Controller Register Offsets, Names, Access and Descriptions
Offset
Register
Access
Description
[0x0000]
SPIXR_DATA
R/W
SPIXR FIFO Data Register
[0x0004]
SPIXR_CTRL1
R/W
SPIXR Master Signals Control Register
[0x0008]
SPIXR_CTRL2
R/W
SPIXR Transmit Packet Size Register
[0x000C]
SPIXR_CTRL3
R/W
SPIXR Static Configuration Register
[0x0010]
SPIXR_SS_TIME
R/W
SPIXR Slave Select Timing Register
[0x0014]
SPIXR_BRG_CTRL
R/W
SPIXR Master Baud Rate Register
[0x001C]
SPIXR_DMA
R/W
SPIXR DMA Control Register
[0x0020]
SPIXR_INT_FL
R/W1C
SPIXR Interrupt Status Flags Register
[0x0024]
SPIXR_INT_EN
R/W
SPIXR Interrupt Enable Register
[0x0028]
SPIXR_WAKE_FL
R/W1C
SPIXR Wakeup Status Flags Register
[0x002C]
SPIXR_WAKE_EN
R/W
SPIXR Wakeup Enable Register

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Maxim Integrated MAX32665 and is the answer not in the manual?

Maxim Integrated MAX32665 Specifications

General IconGeneral
BrandMaxim Integrated
ModelMAX32665
CategoryMotherboard
LanguageEnglish