Maxim Integrated MAX32665 User Manual

MAX32665-MAX32668 User Guide
Maxim Integrated Page 421 of 457
USBHS OUT Endpoint Maximum Packet Size
USBHS_OUTMAXP
[0x0014]
Bits
Name
Access
Reset
Description
10:0
maxpacketsize
R/W
0x000
Maximum Packet Size in a Single Transaction
This is the maximum packet size, in bytes, that is transmitted for each microframe.
The maximum value is 1024, subject to the limitations for the endpoint type set in
the USB 2.0 Specification, Chapter 9.
For all Bulk Transfers, the USB 2.0 Specification requires this to be 8, 16, 32, or 64.
HS Bulk Transfer also supports 512.
Table 21-23: USBHS OUT Endpoint Lower Control Status Register
USBHS OUT Endpoint Lower Control Status
USBHS_OUTCSRL
[0x0016]
Bits
Name
Access
Reset
Description
7
clrdatatog
R/W1O
0
Clear OUT Endpoint Data Toggle
1: Clear the OUT Endpoint data toggle to 0.
Note: Automatically cleared.
6
sentstall
R/W0C
0
STALL Handshake Sent Status
Automatically set when a STALL handshake is transmitted.
Write a 0 to clear.
5
sendstall
R/W
0
Send STALL Handshake
1: Send a STALL handshake to a data packet
0: Terminate STALL handshake
Ignored for Isochronous transfers. Write a 0 to clear.
4
flushfifo
R/W1O
0
Flush OUT FIFO Packet
1: Flush the next packet to be read from the OUT FIFO. This also clears the
outpktrdy bit. This must only be set when outpktrdy = 1, or data corruption in
the FIFO might occur.
If the out FIFO contains two packets, flushfifo might need to be set twice to
completely clear the FIFO.
Note: Automatically cleared when the packet is flushed.
3
dataerror
RO
0
OUT Packet CRC Error Status
Isochronous Mode: Automatically set if a data packet is received (outpktrdy = 1),
and the data packet has a CRC error. Automatically cleared when outpktrdy = 0.
Bulk or Interrupt Modes: Always returns 0.
2
overrun
R/W0C
0
OUT FIFO Overrun Error Status
Isochronous Mode:
Automatically set if the OUT FIFO is full (fifofull = 1), and an OUT packet arrives. In
this case, the OUT packet is lost.
Bulk or Interrupt Modes:
Always reads 0.
Note: Write a 0 to clear.
1
fifofull
RO
0
FIFO Full Status
Set when the OUT FIFO is full.
Note: Automatically cleared when the FIFO is no longer full.
0
outpktrdy
R/W0C
0
OUT Packet Ready Status
Automatically set when a data packet is received in the OUT FIFO.
Write a 0 to clear after the packet is unloaded from the OUT FIFO.
Note: Write 0 to clear.

Maxim Integrated MAX32665 Specifications

General

Brand	Maxim Integrated
Model	MAX32665
Category	Motherboard
Language	English