MAX32665-MAX32668 User Guide
Maxim Integrated Page 429 of 457
23. Trust Protection Unit (TPU)
The trust protection unit (TPU) is a collection of hardware and software mechanisms that provide advanced cryptographic
security. Dedicated hardware engines greatly increase the speed of computationally intensive cryptographic algorithms.
The dedicated symmetric block cipher engine provides the following features:
• AES-128, 192, and 256 (FIPS 197).
• DES and 3DES/TDEA (NIST SP800-67).
• Support for NIST-approved block modes (SP800-38).
• Parallel calculation of block cipher and hash functions
The requirements for meeting security validations are often updated. Contact Maxim before starting any secure product
design to ensure that the cryptographic features of this device are compatible with the most recent requirements.
The dedicated hash function accelerator computes SHA-1, 224, 256, 384, and 512 (FIPS 180-3) values used in CMAC and
HMAC.
Hamming code generator provides the ability to calculate an error correction code (ECC) on a block of data that can detect
single or two-bit errors.
The cryptographic accelerator also provides a dedicated modular arithmetic accelerator (MAA). It provides high speed
calculations of asymmetrical keys used in DSA, RSA, ECDSA and other cryptographic algorithms with modulus and operands
up to 2048 bits in length. The MAA has a dedicated memory space for the operands and operates independently of the CPU
except when loading or unloading the operands.
Most functions are configurable for big- or little-endian operations.
The cryptographic accelerator interfaces with both the APB and AHB busses.
All cryptographic operations begin by resetting the cryptographic block. The cryptographic accelerators functions each have
their own done bit, as well a global done bit for the cryptographic block. The cryptographic accelerators can generate an
interrupt if enabled.
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