Maxim Integrated MAX32665 User Manual

MAX32665-MAX32668 User Guide
Maxim Integrated Page 327 of 457
Table 15-6: HTimer Control Register
HTimer Control
HTIMER_CTRL
[0x0010]
Bits
Field
Access
Reset
Description
31:16
-
R/W
0
Reserved for Future Use
Do not modify this field from its default value.
15
write_en
R/W
0
Write Enable
Software must set this bit to 1 before writing to HTIMER_CTRL.enable.
1: Writes to HTIMER_CTRL.enable are allowed.
0: Writes to HTIMER_CTRL.enable are ignored.
14:8
-
RO
0
Reserved for Future Use
Do not modify this field from its default value.
7
alarm_ss_fl
R/W
0
Short-Interval Alarm Interrupt Flag
This flag is a wake-up source for the processor.
0: No short-interval alarm pending.
1: Short-interval interrupt pending.
6
alarm_tod_fl
R/W
0
Long-Interval Alarm Interrupt Flag
This flag is a wake-up source for the processor.
0: No long-interval alarm interrupt pending.
1: Long-interval interrupt pending.
5
ready_int_en
R/W
0
Timer Ready Interrupt Enable
This interrupt flag is set when the timer ready bit is set by hardware.
0: Interrupt disabled.
1: Interrupt enabled.
4
ready
R/W0O
0
Timer Ready
This bit is set to 1 by hardware when HTIMER_SEC.rts is updated. Software can clear
this bit at any time. Hardware automatically clears this bit just prior to updating the
HTIMER_SEC.rts, indicating the timer is busy.
0: HTIMER_SEC register not updated.
1: HTIMER_SEC register updated.
3
busy
RO
0
Timer Busy Flag
This bit is set by hardware when changes to the registers are synchronized. The bit is
automatically cleared by hardware when the synchronization is complete. Software
should poll this field for 0 after changing registers to ensure the change is complete
prior to making any other register changes.
0: Not busy.
1: Busy.
2
alarm_ss_en
R/W
0
Short-Interval Alarm Interrupt Enable
Set this bit to 1 to enable the short-interval alarm interrupt. Check the
HTIMER_CTRL.busy flag after writing this bit to determine when the register
synchronizations are complete.
0: Short-interval alarm interrupt disabled.
1: Short-interval alarm interrupt disabled.
1
alarm_tod_en
R/W
0
Long-Interval Alarm Interrupt Enable
Set this bit to 1 to enable the long-interval alarm interrupt. Check the
HTIMER_CTRL.busy flag after writing to this bit to determine when the timer
synchronization is complete.
0: Long-interval alarm interrupt is disabled.
1: Long-interval alarm interrupt is enabled.

Maxim Integrated MAX32665 Specifications

General

Brand	Maxim Integrated
Model	MAX32665
Category	Motherboard
Language	English