MAX32665-MAX32668 User Guide
Maxim Integrated Page 397 of 457
To read a single bit value from the 1-Wire Bus, complete the following steps:
1. Set OWM_CFG.single_bit_mode to 1. This setting causes the OWM to transmit/receive a single bit of data at a time
instead of the default 8 bits.
2. Write OWM_DATA.tx_rx to 1. Only bit 0 of this field is used in this instance; the other bits in the field are ignored.
Writing to the OWM_DATA register initiates the read of the bit on the 1-Wire bus.
3. Once the single-bit transmission is complete, hardware sets the interrupt flag OWM_INTFL.tx_data_empty to 1.
This flag (that triggers an OWM module interrupt if OWM_INTEN.tx_data_empty is also set to 1) is cleared by
writing a 1 to the flag.
4. As the hardware shifts the bit value out, it also samples the value returned from the slave device. Once this value is
ready to read, the interrupt flag OWM_INTFL.rx_data_ready is set to 1. If OWM_INTEN.rx_ready is set to 1, an
OWM module interrupt occurs.
5. Read OWM_DATA.tx_rx (only bit 0 is used) to determine the value returned by the slave device. Note that if no
slave devices are present or the slaves are not communicating with the master, bit 0 remains set to 1.
20.5.2 Reading an 8-Bit Value from the 1-Wire Bus
The procedure for reading an 8-bit byte is like the procedure for writing an 8-bit byte because the operation is completed
by writing eight 1 bits that the slave device either leaves unchanged (to transmit 1 bits) or overrides by forcing the line low
(to transmit 0 bits).
1. Set OWM_CFG.single_bit_mode to 0. This setting causes the OWM to transmit/receive in the default 8-bit mode.
2. Write OWM_DATA.tx_rx to 0x0FFh.
3. Once the 8-bit transmission completes, hardware sets the interrupt flag OWM_INTFL.tx_data_empty to 1. This flag
(that triggers an OWM module interrupt if OWM_INTEN.tx_data_empty is also set to 1) is cleared by writing a 1 to
the flag.
4. As the hardware shifts the bit values out, it also samples the values returned from the slave device. Once the full 8-
bit value is ready to be read, the interrupt flag OWM_INTFL.rx_data_ready is set to 1. If OWM_INTEN.rx_ready is
set to 1, an OWM module interrupt occurs.
5. Read OWM_DATA.tx_rx to determine the 8-bit value returned by the slave device. Note that if no slave devices are
present or the slave devices are not communicating with the master, the return value 0x0FF is the same as the
transmitted value.
20.6 Registers
See Table 3-1: APB Peripheral Base Address Map for this peripheral/module's base address. If multiple instances are
provided, each will have a unique base address. Unless specified otherwise, all fields are reset on a system reset, soft reset,
POR, and the peripheral-specific reset, if applicable.
Table 20-4: OWM Register Summary
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