Maxim Integrated MAX32665 - USBHS Device Register Details; Table 21-6: USBHS Device Address Register; Table 21-7: USBHS Power Management Register

MAX32665-MAX32668 User Guide
Maxim Integrated Page 410 of 457
Offset
Register Name
Access
Description
[0x007B]
USBHS_EARLYDMA
R/W
USBHS Early DMA Register
[0x0080]
USBHS_CTUCH
R/W
USBHS Hi-Speed Chirp Timeout Register
[0x0082]
USBHS_CTHSRTN
R/W
USBHS Hi-Speed RESUME Delay Register
21.12 USBHS Device Register Details
Table 21-6: USBHS Device Address Register
USBHS Device Address Register
USBHS_FADDR
[0x0000]
Bits
Name
Access
Reset
Description
7
update
RO
0
Read USBHS Device Update Status
0: The Device address in the bit field addr is presently used.
1: New address written to the bit field addr is pending. New address takes
effect at the end of the current transfer.
6:0
faddr
R/W
0
USBHS Device Address
This is the USB Device address specified by the external USB Host during the
enumeration process. It must be written with the address value contained in the
SET_ADDRESS Device request when received during a Control Transaction.
Table 21-7: USBHS Power Management Register
USBHS Power Management
USBHS_POWER
[0x0001]
Bits
Name
Access
Reset
Description
7
iso_update
R/W
0
Isochronous Update
1: If an SOF token is received from the Host and a packet is in the IN FIFO
(USBHS_INCSRL.inpktrdy= 1), then send the packet. However, if an IN token is
received from the Host before an SOF token, then send a zero-length data
packet.
Note: This register is only applicable in Isochronous Mode and ignored in all other
modes.
6
softconn
R/W
0
Soft Connect/Disconnect PHY
0: The USB D+/D- lines of the PHY are tri-stated, and this USB is electrically
disconnected from the USB bus.
1: The USB D+/D- lines of the PHY are enabled.
5
hs_enable
R/W
1
Enable Hi-Speed (HS) Mode
0: USB remains in Full Speed Mode even if connected to a USB HS port.
1: USB always negotiates for HS mode on the bus.
4
hs_mode
RO
0
Read Hi-Speed Mode Status Flag
0 = USB in Full Speed Mode.
1 = USB in Hi-Speed Mode.
3
power_reset
RO
0
Read RESET Mode Status Flag
0 = Normal operation.
1 = RESET state is on the bus.
2
resume
R/W
0
Generate RESUME State
Set to generate a RESUME state on the bus. Once set, it should be left set for at
least 10ms and no more than 15ms, then cleared.
1
suspend
RO
0
Read SUSPEND Mode Status
0 = Normal operation.
1 = USBHS is in SUSPEND Mode.
Note: Automatically cleared when a SUSPEND Mode interrupt occurs, or if the
resume bit (above) is set to 1.