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Maxim Integrated MAX32665 - Table 8-35. SPIXR Wakeup Enable Register; Table 8-36. SPIXR Active Status Register; Table 8-37. SPIXR External Memory Control Register

Maxim Integrated MAX32665
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MAX32665-MAX32668 User Guide
Maxim Integrated Page 177 of 457
Table 8-35. SPIXR Wakeup Enable Register
SPIXR Wakeup Enable Register
SPIXR_WAKE_EN
[0x002C]
Bits
Name
Access
Reset
Description
31:4
-
R/W
0
Reserved for Future Use
Do not modify this field.
3
rx_full
R/W
0
Wake on RX FIFO Full Enable
Set to 1 to wake up the device when this RX FIFO is full.
0: Wakeup Disabled for this condition.
1: Wakeup Enabled for this condition.
2
rx_level
R/W
0
Wake on RX FIFO Threshold Level Crossed Enable
Set to 1 to wake up the device when this RX FIFO is full.
0: Wakeup Disabled for this condition.
1: Wakeup Enabled for this condition.
1
tx_empty
R/W
0
Wake on TX FIFO Empty Enable
Set to 1 to wake up the device when this RX FIFO is full.
0: Wakeup Disabled for this condition.
1: Wakeup Enabled for this condition.
0
tx_level
R/W
0
Wake on TX FIFO Threshold Level Crossed Enable
Set to 1 to wake up the device when this RX FIFO is full.
0: Wakeup Disabled for this condition.
1: Wakeup Enabled for this condition.
Table 8-36. SPIXR Active Status Register
SPIXR Active Status Register
SPIXR_STAT
[0x0030]
Bits
Name
Access
Reset
Description
31:1
-
RO
0
Reserved for Future Use
Do not modify this field.
0
busy
RO
0
SPI Active Status
This field returns the status of the SPIXR communications. Hardware sets and
clears this field automatically when SPI communications are active or complete.
0: SPI is not active. Cleared when the last character is sent.
1: SPI is active. Set when transmit starts.
Table 8-37. SPIXR External Memory Control Register
SPIXR External Memory Control Register
SPIXR_XMEM_CTRL
[0x0034]
Bits
Name
Access
Reset
Description
31
xmem_en
R/W
0
Enable External Memory
0: XMEM disabled
1: XMEM enabled
30:24
-
R/W
0
Reserved for Future Use
Do not modify this field.
23:16
xmem_dclks
R/W
0
Number of dummy characters between address phase and read data from the
external memory.
0: no delay between address and read data
1:255 delay number of characters

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