MAX32665-MAX32668 User Guide
Maxim Integrated Page 452 of 457
Calculation Configuration
These bits select the MAA calculation.
0b000: Modular exponentiation
0b001: Square operation
0b010: Multiplication
0b011: Square followed by a multiplication
0b100: Addition
0b101: Subtraction
0b110: Reserved
0b111: Reserved
Start Calculation
This bit functions as both the control and the status of the MAA. Setting this bit
initiates a calculation. It remains set while the calculation is in progress, and is cleared
by hardware when the calculation is finished. The bit is cleared by hardware if the
MAA_MAWS.msgsz value is invalid or the MAAER bit is set.
Clearing this bit in software resets the controller to its default state.
0: No operation
1: Start calculation specified by CLC
Table 23-16: Cryptographic Data Input Register
Cryptographic Data In Register 0 [31:0]
Cryptographic Data In Register 1 [63:32]
Cryptographic Data In Register 2 [95:64]
Cryptographic Data In Register 3 [127:96]
Cryptographic Data Input
These registers form the read FIFO for the CMDA. The endian swap input control bit
(CRYPTO_CTRL.BSI) affects this register.
Table 23-17: Cryptographic Data Output Register
Cryptographic Data Out Register 0 [31:0]
Cryptographic Data Out Register 1 [63:32]
Cryptographic Data Out Register 2 [95:64]
Cryptographic Data Out Register 3 [127:96]
Cryptographic Data Output
These registers form the write FIFO for the CMDA. Data is placed in the lower words of
these four registers depending on the algorithm. For block cipher modes, this register
holds the result of most recent encryption or decryption operation. These registers are
affected by the endian swap bit (CRYPTO_CTRL.BSO).
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