Maxim Integrated MAX32665 User Manual

MAX32665-MAX32668 User Guide
Maxim Integrated Page 29 of 457
2.3 Registers
See Table 3-1: APB Peripheral Base Address Map for the RPU Peripheral Base Address.
Table 2-5: RPU APB Register Offsets, Names, Access, and Descriptions
Offset
Register
Access
Description
[0x0000]
GCR
R/W
GCR RPU Register
[0x0004]
SIR
R/W
SIR RPU Register
[0x0008]
FCR
R/W
FCR RPU Register
[0x0010]
TPU
R/W
TPU RPU Register
[0x0020]
RPU
R/W
RPU Register
[0x0030]
WDT0
R/W
WDT0 RPU Register
[0x0034]
WDT1
R/W
WDT1 RPU Register
[0x0038]
WDT2
R/W
WDT2 RPU Register
[0x0040]
SMON
R/W
SMON RPU Register
[0x0044]
SIMO
R/W
SIMO RPU Register
[0x0048]
DVS
R/W
DVS RPU Register
[0x0050]
AES
R/W
AES RPU Register
[0x0060]
RTC
R/W
RTC RPU Register
[0x0064]
WUT
R/W
WUT RPU Register
[0x0068]
PWRSEQ
R/W
PWRSEQ RPU Register
[0x006C]
MCR
R/W
MCR RPU Register
[0x0080]
GPIO0
R/W
GPIO0 RPU Register
[0x0090]
GPIO1
R/W
GPIO1 RPU Register
[0x0100]
TMR0
R/W
TMR0 RPU Register
[0x0110]
TMR1
R/W
TMR1 RPU Register
[0x0120]
TMR2
R/W
TMR2 RPU Register
[0x0130]
TMR3
R/W
TMR3 RPU Register
[0x0140]
TMR4
R/W
TMR4 RPU Register
[0x0150]
TMR5
R/W
TMR5 RPU Register
[0x01B0]
HTMR0
R/W
HTMR0 RPU Register
[0x01C0]
HTMR1
R/W
HTMR1 RPU Register
[0x01D0]
I2C0_BUS0
R/W
I2C0_BUS0 RPU Register
[0x01E0]
I2C1_BUS0
R/W
I2C1_BUS0 RPU Register
[0x01F0]
I2C2_BUS0
R/W
I2C2_BUS0 RPU Register
[0x0260]
SPIXF
R/W
SPIXF RPU Register

Maxim Integrated MAX32665 Specifications

General

Brand	Maxim Integrated
Model	MAX32665
Category	Motherboard
Language	English