MAX32665-MAX32668 User Guide
Maxim Integrated Page 262 of 457
Equation 12-1: UART Bit Rate Divisor Equation
where,
f
UART_BIT_RATE_CLK
is the UART interface time base frequency. This frequency is either f
PCLK
or the 7.3728MHz clock.
Note: UARTn_BAUD0.clkdiv should be set to the lowest value that results in
to achieve the highest accuracy for
the target bit rate.
is a function that takes as input a real number and gives as output the greatest integer less than or
equal to x
Equation 12-2: Bit Rate Integer Calculation
Equation 12-3: Bit Rate Remainder Calculation
if (y > 3)
else
Example Baud Rate Calculation:
Table 12-2: Example Baud Rate Calculation Results, Target Bit Rate = 1.8Mbps
Table 12-2, above, shows the resulting DIV for each of the UARTn_BAUD0.clkdiv field settings. With UARTn_BAUD0.clkdiv
set to 4 or3, the resulting DIV value is greater than 1. Setting UARTn_BAUD0.clkdiv to 3 will generate the most accurate
To Next Page
Loading...
Need help?
General