Maxim Integrated MAX32665 - Table 4-57: Power Management Register

MAX32665-MAX32668 User Guide
Maxim Integrated Page 92 of 457
System Clock Control
GCR_CLK_CTRL
[0x0008]
Bits
Field
Access
Reset
Description
5:0
-
R/W
0b001000
Reserved
Do not modify this field.
Table 4-57: Power Management Register
Power Management
GCR_PMR
0x000C
Bits
Field
Access
Reset
Description
31:21
-
RO
0
Reserved
Do not modify this field.
20
xtalpb
R/W
0
32MHz Bluetooth Oscillator Bypass
This bit is set to 0 on a POR and is not affected by other resets.
0: Clock source is crystal oscillator, driving 32MHz crystal connected between
HFXIN and HFXOUT pins.
1: Clock source is 32MHz square wave driven into HFXIN pin.
19:18
-
RO
0
Reserved
Do not modify this field.
17:15
-
R/W
1
Reserved
Do not modify this field.
14:10
-
RO
0
Reserved
Do not modify this field.
9
compwken
R/W
0
Comparator Input Wake Up Enable
The device will exit SLEEP, DEEPSLEEP and BACKUP modes when hardware generates
the corresponding interrupt.
0: Disabled.
1: Enabled.
8
-
RO
0
Reserved
Do not modify this field.
7
wutwken
R/W
0
Wakeup Timer Wake Up Enable
A wakeup event exits:
SLEEP
DEEPSLEEP
BACKUP
0: Disabled.
1: Enabled.
6
usbwken
R/W
0
USB Wakeup Enable
A wakeup event causes an exit from all low power modes and transitions directly to
ACTIVE mode.
0: Disabled.
1: Enabled.
Any USB bus activity or USB power on/off wakes up the device, except in
BACKUP mode when only a USB power on/off wakes the device.
5
rtcwken
R/W
0
RTC Alarm Wakeup Enable
Set this field to 1 to enable an RTC alarm to wake the device from any low power
mode to ACTIVE mode.
0: Disabled. Wakeup from RTC alarm disabled, regardless if the RTC is configured to
generate a wakeup alarm.
1: Enabled.