MAX32665-MAX32668 User Guide
Maxim Integrated Page 140 of 457
Flash Controller Interrupt Register
Flash Access Fail Interrupt Flag
This bit is set when an attempt is made to write or erase the flash while
the flash is busy or locked. Only hardware can set this bit to 1. Writing a 1
to this bit has no effect. This bit is cleared by writing a 0.
0: No access failure has occurred.
1: Access failure occurred.
Flash Operation Complete Interrupt Flag
This flag is automatically set by hardware after a flash write or erase
operation completes.
0: Operation not complete or not in process.
1: Flash operation complete.
Table 7-8: Flash Controller ECC Data Register
Flash Controller ECC Data Register
Reserved for Future Use
Do not modify this field.
Error Correction Code Odd Data
9-bit ECC data recorded from the last flash read memory location of odd
address of the even/odd pair of 128-bit flash memory content.
Reserved for Future Use
Do not modify this field.
Error Correction Code Even Data
9-bit ECC data recorded from the last flash read memory location of even
address of the even/odd pair of 128-bit flash memory content.
Table 7-9: Flash Controller Data Register 0
Flash Controller Data Register 0
Flash Data 0
Flash data for bits 31:0.
Table 7-10: Flash Controller Data Register 1
Flash Controller Data Register 1
Flash Data 1
Flash data for bits 63:32
Table 7-11: Flash Controller Data Register 2
Flash Controller Data Register 2
Flash Data 2
Flash data for bits 95:64